Public Access
mangavalkandClaude Opus 5.5
7e738b951b
Commit src/still_alive/imported.h instead of ignoring it. The importer now writes a source reference (SDSkyKlouD/still-alive-web) and a disclaimer (Jonathan Coulton / Valve, personal non-commercial use, not affiliated) at the top of the file; the README carries the same disclaimer. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
135 lines
6.5 KiB
Markdown
135 lines
6.5 KiB
Markdown
# Planar EL512.256-H on ESP32
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Drive a Planar EL512.256-H (512 × 256, monochrome electroluminescent) panel from an
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ESP-WROOM-32 (classic ESP32), with an [Adafruit GFX](https://github.com/adafruit/Adafruit-GFX-Library)
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compatible driver so the usual drawing, text and font APIs work.
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The panel has no frame memory and needs a continuous video stream. The ESP32's I2S0
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peripheral in 8-bit parallel (LCD) mode streams a precomputed frame from DMA, so the
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CPU is free while the panel refreshes.
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**Status:** framebuffer, GFX layer, row encoder and I2S/DMA refresh are implemented and
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run on hardware: the panel shows a correct image (VCLK 5 MHz, HS and VS checked with
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the ESP32's PCNT). Updates are not yet tear-free.
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## Hardware
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- ESP-WROOM-32 dev board (`esp32dev`)
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- Planar EL512.256-H, configured for **two-bit parallel mode**: jumper 2 (DCONFIG) of pin
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strip PS1 removed, jumper 1 (SELFTST) fitted (datasheet Table 3)
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- Datasheet: [docs/datasheet/EL512.256-H3 FRB.pdf](docs/datasheet/EL512.256-H3%20FRB.pdf)
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- Check the panel's logic-level and supply requirements in the datasheet before wiring.
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## Wiring
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| Panel signal | Panel pin (Table 1) | Function | ESP32 GPIO | DMA byte bit |
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|--------------|---------------------|----------------------------------------------|-----------:|-------------:|
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| VCLK | J1-13 | Video clock, data latched on rising edge | 18 | I2S0 BCK |
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| VID | J1-15 | Pixel data, even columns (x = 1, 3, …) | 19 | 0 |
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| TVID | J1-7 | Pixel data, odd columns (x = 0, 2, …) | 21 | 1 |
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| HS | J1-11 | Horizontal sync | 22 | 2 |
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| VS | J1-9 | Vertical sync (rising edge used) | 23 | 3 |
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| ENABLE | J2-6 | Display enable, low = off | 25 | — |
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| _LOWPWR | J2-5 | Low-power mode, low = on | 26 | — |
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| GND | J1-6, 8, 10, 12, 14, 16 | Signal return | GND | — |
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The datasheet numbers columns 1 to 512 from the left; x in the code is 0-based, so
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x = 0 is column 1 (odd, TVID).
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Power (Table 1, Table 4): Vcc1 +5 V logic on J1-3, 4 (4.75–5.25 V, 0.2 A max);
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Vcc2 +11…+30 V on J1-1, 2 (0.9 A max at 12 V). J1-5 is reserved: do not connect.
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The panel inputs are HCT compatible with internal pull-ups of unstated voltage, and the
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ESP32 is not 5 V tolerant, so drive them through a 74HCT245 or 74AHCT541 powered from
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5 V (see the plan). ENABLE is pulled high inside the panel, so the panel scans while
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the ESP32 is still booting and VCLK is not running yet; add a pull-down (for example
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10 kΩ) on the buffer's ENABLE input so the panel stays off until `begin()` starts the
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stream. Keep the cable under 300 mm, or add 47 Ω series resistors for up to 2 m.
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The pin map lives in [include/pins.h](include/pins.h).
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## Timing
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| Parameter | Value | Datasheet limit (Tables 5, 6) |
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|----------------------|-----------------------------------------|---------------------------------|
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| Pixel clock (VCLK) | 5 MHz, 2 pixels per clock | 30 MHz max, keep running |
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| HS high (T7) | 256 clocks | 256 in two-bit mode, even |
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| HS low (T6) | 16 clocks | 4 clocks min |
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| HS period (T8) | 272 clocks = 54.4 µs | 50 µs min |
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| Lines per frame | 261 (256 visible + 5 blanking) | 256 rows + T1 |
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| Front porch (T1) | 220.8 µs (last row end to VS rise) | 100 µs min |
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| Refresh | 5 MHz / (272 × 261) ≈ 70.4 Hz | 70 Hz typ, 75 Hz max |
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The datasheet ([docs/datasheet/](docs/datasheet/EL512.256-H3%20FRB.pdf)) is the source of
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truth; if anything here disagrees with it, the datasheet wins.
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## Layout
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```
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platformio.ini build config: envs still_alive (default) and esp32dev
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include/pins.h pin map
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src/still_alive/ Portal-style end-credits demo (env still_alive)
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src/test_images/ test sketch: cycles through 12 test images (env esp32dev)
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lib/EL512/ local library
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src/EL512Panel.* framebuffer, row encoder, I2S DMA refresh
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src/EL512_GFX.* Adafruit_GFX subclass
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tools/ import_still_alive.py
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test/ unit tests (placeholder)
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docs/ datasheet and notes
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```
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## Build and flash
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Requires [PlatformIO](https://platformio.org/) (CLI or the VS Code extension).
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The upload and monitor port is set to COM20 in `platformio.ini`.
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```bash
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pio run -e still_alive -t upload # end-credits demo
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pio run -e esp32dev -t upload # test images
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pio device monitor
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```
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## Still Alive demo
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A recreation of Portal's ending: timed song text typed into a console on the
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left, credits scrolling top right, ASCII art bottom right. The text, timing, art
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and credits in `src/still_alive/imported.h` come from
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[SDSkyKlouD/still-alive-web](https://github.com/SDSkyKlouD/still-alive-web) and can
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be regenerated with:
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```bash
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python tools/import_still_alive.py
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pio run -e still_alive -t upload
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```
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Without `imported.h` the demo plays placeholder text. Reset the board and start the
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song when the serial log says (7.75 s after reset with the imported data).
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**Disclaimer:** "Still Alive" was written by Jonathan Coulton for Portal (2007).
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Portal, its credits and ASCII art are © Valve Corporation (see
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[Valve Legal Info](https://store.steampowered.com/legal/)); the web recreation they
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are imported from is by [SD SkyKlouD](https://github.com/SDSkyKlouD/still-alive-web).
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They are included only for personal, non-commercial use in this hobby project, and
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all rights remain with their owners. This project is not affiliated with or
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endorsed by Valve.
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## Using the driver
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```cpp
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#include <EL512.h>
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#include "pins.h"
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EL512Panel panel({el512pins::VCLK, el512pins::VID, el512pins::TVID, el512pins::HS,
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el512pins::VS, el512pins::ENABLE, el512pins::LOWPWR_N});
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EL512_GFX display(panel);
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void setup() {
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display.begin();
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display.setTextColor(1);
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display.print("Hello");
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display.display(); // push the drawing buffer to the refresh stream
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}
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```
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See [docs/README.md](docs/README.md) for design notes and the plan.
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