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Invert VCLK to fix pixel jitter
Uninverted, the rising BCK edge landed on the boundary between byte pairs, so the panel sampled data mid-change and the image jittered. Inverted, the edge sits mid-pair; verified stable on the panel. Also note the row-stripe brightness drift as an open item. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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@@ -23,9 +23,10 @@ static_assert(I2S_CLKM_DIV >= 2 && I2S_CLKM_DIV <= 255, "clkm_div_num out of ran
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constexpr uint32_t I2S0_DATA_SIGNAL_BASE = I2S0O_DATA_OUT16_IDX;
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// BCK runs at half the byte rate (measured: 2.5 MHz BCK at 5 MHz bytes), so each
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// VCLK period spans two identical bytes. Unverified which BCK edge lines up with
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// the byte pair boundary: if pixels look shifted or noisy, set this to true.
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constexpr bool INVERT_VCLK = false;
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// VCLK period spans two identical bytes. Uninverted, the rising edge landed on the
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// byte-pair boundary and the image jittered; inverted, it sits mid-pair (verified
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// on the panel).
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constexpr bool INVERT_VCLK = true;
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// One DMA descriptor per stream chunk (descriptor limit 4095 bytes).
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static_assert(EL512Panel::LINES_PER_CHUNK * EL512Panel::ROW_BYTES <= 4092, "descriptor too long");
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