mangavalkandClaude Opus 5.5
28c666506e
- Placement script (layout_pcb.py): LV left, HV right, panel connector on the boundary, terminal blocks on the edges, heatsink space for the TO-220s - Freerouting-based routing script (route_pcb.py) that routes with oversized tracks/vias and shrinks them, giving 3 mm HV-to-LV and 1.3 mm HV-to-HV - Custom DRC rules (plasma_dmd_psu.kicad_dru) with documented exceptions - Wide TO-92 footprints; schematic generator now keeps symbol UUIDs - DRC: 0 violations, 0 unconnected pads, schematic parity OK Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
29 lines
368 B
Plaintext
29 lines
368 B
Plaintext
# PlatformIO
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firmware/.pio/
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firmware/.vscode/
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# KiCad backups, caches and local state
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*-backups/
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*.kicad_prl
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fp-info-cache
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*.lck
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\#auto_saved_files#
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_autosave-*
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*.bak
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# Python
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__pycache__/
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# KiCad generated reports
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hardware/kicad/erc.rpt
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*.net
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# Local tools (Freerouting jar)
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tools/
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# KiCad local history
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.history/
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# Freerouting work files
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hardware/kicad/route/
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