64 lines
1.7 KiB
Plaintext
64 lines
1.7 KiB
Plaintext
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# Created by https://www.gitignore.io/api/alteraquartusii
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### AlteraQuartusII ###
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##list taken from http://www.alterawiki.com/wiki/Version_Control (01.10.2015)
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######### Quartus II source files
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# project files:
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### project_name.qpf Quartus II project file
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### project_name.qsf Quartus constraint file (lists the hardware constraints defined for a project, from the used chip and pinout to timing constraints)
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### project_name.qws Quartus Window Settings ? (the configuration of the Quartus gui for the project, may be omitted)
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# top level source files:
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### project_name.bdf Block diagram / Schematic file (top level schematic file, there may be many nested files)
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### project_name.vhd VHDL file (top level VHDL file)
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### project_name.v Verilog file (top level Verilog file)
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# component source files:
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### component_name.bsf Block Symbol file (component symbol file)
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### component_name.vhd VHDL file (top level VHDL file)
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### component_name.v Verilog file (top level Verilog file)
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# SOPC builder project source files (SOPC builder creates many VHDL or Verilog files, that you do not need to store)
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### sopc_project_name.ptf the list and configuration of components selected in the SOPC gui
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### sopc_project_name.bsf Block Symbol file (SOPC component symbol file, especially if you modified it)
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# Board Description (if you created your own board, the list is incomplete!)
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### board_name/class.ptf
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# software source files:
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### tbd
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######## Quartus II binary files
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# hardware binary files
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### project_name.sof SRAM Object File
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# software binary files
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### tbd
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/*
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!/*.gitignore
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##
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!*.qpf
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!*.qsf
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!*.qws
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##
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!*.bdf
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!*.vhd
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!*.v
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##
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!*.ptf
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!*.bsf
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##
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!**/class.ptf
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##
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!*.tbd
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##
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!*.sof
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##
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## tbd
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!*.tcl |