Files
planar-EL512.256-H/test
mangavalkandClaude Opus 5.5 ab3e6ad0ac Project check against the datasheet; fix column parity
The datasheet numbers columns from 1 (Fig. 3: "row 1", "Last pixel
(512 / 256)") and puts odd columns on TVID, so x = 0 (column 1) now
goes to TVID and x = 1 to VID; the encoder had them swapped.

README wiring now lists the J1/J2 pins and power rails from Table 1,
the 5 V buffer, and a pull-down on ENABLE so the panel stays off while
the ESP32 boots without VCLK. encodeRow() documents its T4/T5 margins.
docs/README.md open items are regrouped into done, hardware checks and
software work. main.cpp counts seconds, not frames.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 21:17:29 +02:00
..

Unit tests (PlatformIO Unit Testing / Unity) go here.

Planned first test: EL512Panel::encodeRow() - check that HS is high for exactly
256 clocks per visible row, VS appears only on the last blanking line, that x = 0
(datasheet column 1, odd) lands on TVID and x = 1 on VID, and that clock c is
stored at index c ^ 2 (8-bit I2S byte order).

Run with:  pio test -e esp32dev

More info: https://docs.platformio.org/en/latest/advanced/unit-testing/index.html