Implement I2S0 8-bit LCD-mode DMA refresh

startI2S() sets up I2S0 in 8-bit parallel (LCD) mode at 5 MHz
(PLL_D2 160 MHz / 32, BCK div 1), routes stream bits 0..3 to
VID/TVID/HS/VS via I2S0O_DATA_OUT16+n and BCK to VCLK, and loops
DMA over an 18-descriptor chain of whole lines. stopI2S() stops TX,
returns the pins to GPIO low and frees the chain.

encodeRow() now stores clock c at c ^ 2 to match the 8-bit mode
byte order (bytes 2, 3, 0, 1 per word, as in bitluni's ESP32Lib).

Builds with no warnings; not yet checked on hardware.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

include/pins.h

@@ -9,7 +9,7 @@
 namespace el512pins {
 
 // I2S-driven signals
-constexpr int8_t VCLK = 18;  // I2S0 WS/clock out -> panel VCLK
+constexpr int8_t VCLK = 18;  // I2S0 BCK out -> panel VCLK
 constexpr int8_t VID  = 19;  // byte bit 0
 constexpr int8_t TVID = 21;  // byte bit 1
 constexpr int8_t HS   = 22;  // byte bit 2