mmdolze
eaf74128c6
- Add 68-familiy style interface support and make it configurable. - Make delay configurable. - Correct swapped display halves. - Resurrect vBar / hBar functions. - Fix icon definitions and modify set_char for common data format.
286 lines
8.3 KiB
Plaintext
286 lines
8.3 KiB
Plaintext
<sect1 id="sed1520-howto">
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<title>The sed1520 Driver</title>
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<para>
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This section talks about using LCDproc with LCD displays that use the
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SED1520 chipset.
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</para>
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<para>Currently the driver supports 122x32 pixel graphic displays based on
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the SED1520 controller connected to the parallel port.</para>
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<note>
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<para>Those SED1520 displays are the most troublesome I have ever used. You
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should probably avoid using them and get a 20x4 text display instead.</para>
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</note>
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<sect2 id="sed1520-connections">
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<title>Connections</title>
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<!-- Insert schematic here -->
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<warning>
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<para>Displays using SED1520 come in a wide variety of configurations. It is
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possible to cause harm to your display (e.g. connecting negative voltage
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incorrectly. Be sure to check your datasheet! Do not try to use a display
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without having a datasheet to check against!</para>
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<para>Here here some of the options I encountered:</para>
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<itemizedlist>
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<listitem><para>Negative voltage: The chip requires negative voltage for
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driving the display. Some display modules have a negative voltage converter
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on-board. On those that don't you have to supply about -7 V (will not
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show how to do this).</para></listitem>
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<listitem><para>Reset circuit: Some display modules have an R/C-combination
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on-board selecting an MCU interface if the pin is not connected.</para></listitem>
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<listitem><para>Frequency generator: The SED1520 is manufactured in several
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versions. Some contain an on-chip frequency generator, others require an external
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clock of 2 kHz (won't show this here). Note that display modules with an
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on-chip generator do not have a /CS (chip select) line.</para></listitem>
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<listitem><para>Incorrect datasheets: I have seen display datasheets
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incorrectly naming pins, missing some of the commands, missing pages from the
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chip description and other odds. Be warned!</para></listitem>
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<listitem><para>No pin numbers are given in the tables below. You have to
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figure out those yourself from the datasheet for your display!</para></listitem>
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</itemizedlist>
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</warning>
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<para>That said here some wirings:</para>
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<sect3 id="sed1520-80">
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<title>80-style connection style</title>
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<para>This mode of operation is selected if the RESET line is wired to ground.
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The wiring used by this driver in 80-style mode requires the use of an external
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74HC04 inverter and assumes you have /CS1 and /CS2 lines available (thus you
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must have an external clock generator) and toggles the /RW line. This is the
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original wiring by Robin Adams.</para>
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<table id="sed1520-connections-80-mapping">
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<title>SED1520 80-style wiring schematic</title>
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<tgroup cols="5" align="left">
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<colspec colname="lpt1"/>
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<colspec colname="lpt2" align="right"/>
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<colspec colname="base" align="center"/>
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<colspec colname="lcd1"/>
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<colspec colname="lcd2"/>
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<thead>
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<row>
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<entry namest="lpt1" nameend="lpt2" align="center">Parallel port</entry>
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<entry morerows="1"><-></entry>
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<entry namest="lcd1" nameend="lcd2" align="center">LCD</entry>
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</row>
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<row>
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<entry>name</entry>
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<entry>pin</entry>
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<entry>name</entry>
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<entry>pin</entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry>D0-D7</entry>
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<entry>2-9</entry>
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<entry></entry>
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<entry>DB0-DB7</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>nSTRB</entry>
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<entry>1</entry>
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<entry></entry>
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<entry>/WR</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>nLF</entry>
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<entry>14</entry>
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<entry></entry>
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<entry>/CS1</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>INIT</entry>
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<entry>16</entry>
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<entry></entry>
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<entry>/CS2</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>nSEL</entry>
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<entry>17</entry>
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<entry></entry>
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<entry>A0</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry>VDD</entry>
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<entry>/RD</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry>GND</entry>
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<entry>RESET/IF</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry>2 kHz clock</entry>
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<entry>CL</entry>
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<entry>*</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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</sect3>
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<sect3 id="sed1520-68">
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<title>68-style connection style</title>
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<para>This mode of operation is selected if the RESET line is wired to VDD.
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For this wiring the display is required to have an on-board frequency generator
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(something you really want to have) and the display module has an E1 and E2
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line. Writing is controlled by toggling the E1 and E2 line while /RW is low.
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</para>
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<table id="sed1520-connections-68-mapping">
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<title>SED1520 68-style wiring schematic</title>
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<tgroup cols="5" align="left">
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<colspec colname="lpt1"/>
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<colspec colname="lpt2" align="right"/>
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<colspec colname="base" align="center"/>
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<colspec colname="lcd1"/>
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<colspec colname="lcd2"/>
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<thead>
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<row>
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<entry namest="lpt1" nameend="lpt2" align="center">Parallel port</entry>
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<entry morerows="1"><-></entry>
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<entry namest="lcd1" nameend="lcd2" align="center">LCD</entry>
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</row>
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<row>
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<entry>name</entry>
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<entry>pin</entry>
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<entry>name</entry>
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<entry>pin</entry>
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</row>
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</thead>
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<tbody>
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<row>
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<entry>D0-D7</entry>
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<entry>2-9</entry>
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<entry></entry>
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<entry>DB0-DB7</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>nSTRB</entry>
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<entry>1</entry>
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<entry></entry>
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<entry>R/-W</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>nLF</entry>
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<entry>14</entry>
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<entry></entry>
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<entry>E1</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>INIT</entry>
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<entry>16</entry>
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<entry></entry>
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<entry>E2</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry>nSEL</entry>
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<entry>17</entry>
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<entry></entry>
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<entry>A0</entry>
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<entry>*</entry>
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</row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry>VDD</entry>
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<entry>RESET/IF</entry>
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<entry>*</entry>
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</row>
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</tbody>
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</tgroup>
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</table>
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<note>
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<para>This is the only wiring I was able to test. My display (Crystalfontz
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CFAG12232J-TFH-TA) has E1 and E2 lines. Trying to use it with 80-style wiring
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was not successful. I suspect that (as the E# line is used as /RD line in
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80-style mode) the wiring resulted in reading from one chip while writing to
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the other at the same time and the data bus got fuzzed.</para>
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</note>
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</sect3>
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</sect2>
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<!-- ## Seiko Epson 1520 driver ## -->
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<sect2 id="sed1520-config">
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<title>Configuration in LCDd.conf</title>
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<sect3 id="sed1520-config-section">
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<title>[sed1520]</title>
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<variablelist>
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<varlistentry>
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<term>
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<property>Port</property> =
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<parameter><replaceable>PORT</replaceable></parameter>
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</term>
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<listitem><para>
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Specify the address of the parallel port the LCD is connected to.
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Common values for <replaceable>PORT</replaceable> are <literal>0x278</literal>,
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<literal>0x378</literal> and <literal>0x3BC</literal>.
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The default value is <literal>0x378</literal>.
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>
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<property>InterfaceType</property> =
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<parameter><replaceable>INTERFACE</replaceable></parameter>
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</term>
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<listitem><para>
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The SED1520 chip can be driven with one of two interface types selected by
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the level of the RESET line: 68-style MCU interface (high level) or
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80-style MCU interface (low level).
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</para><para>
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Use value <literal>68</literal> if your display is connected 68-style
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style. In this mode the E1 and E2 lines are cycled to write the data. If
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you use <literal>80</literal> (the default), 80-style style is selected
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and the /WR line is cycled and /CS1 and /CS2 lines are required.
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</para></listitem>
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</varlistentry>
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<varlistentry>
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<term>
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<property>DelayMult</property> =
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<parameter><replaceable>DELAY</replaceable></parameter>
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</term>
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<listitem><para>
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This value adds an additional delay to each write, in microseconds. For
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the 80-style connection type actual two delays are added each. The
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default value of <literal>1</literal> already slows down communication a
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lot, larger value should likely be avoided.
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</para></listitem>
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</varlistentry>
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</variablelist>
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</sect3>
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</sect2>
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</sect1>
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