Make the sed1520 driver work in 80-family connection style without requiring
an external inverter.
This commit is contained in:
@@ -21,6 +21,7 @@ v0.5dev (ongoing development)
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+ glcd driver: new connection type 'glcd2usb'
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+ glcd driver: new connection type 'glcd2usb'
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* lcdproc client: On FreeBSD show only unique processes in 'S' screen
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* lcdproc client: On FreeBSD show only unique processes in 'S' screen
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* picolcd: Use libusb-1.0 asynchronous transfers to fix missed keys (M. Jones)
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* picolcd: Use libusb-1.0 asynchronous transfers to fix missed keys (M. Jones)
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* sed1520: Make it work without using an external inverter
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v0.5.5
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v0.5.5
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+ sed1330 driver: Add support for HG25504 (L. Lagendijk)
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+ sed1330 driver: Add support for HG25504 (L. Lagendijk)
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@@ -1029,13 +1029,18 @@ Port=0x378
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# Select the interface type (wiring) for the display. Supported values are
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# Select the interface type (wiring) for the display. Supported values are
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# 68 for 68-style connection (RESET level high) and 80 for 80-style connection
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# 68 for 68-style connection (RESET level high) and 80 for 80-style connection
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# (RESET level low). [legal: 68, 80; default: 80]
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# (RESET level low). [legal: 68, 80; default: 80]
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InterfaceType=68
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InterfaceType=80
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# On fast machines it may be necessary to slow down transfer to the display.
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# On fast machines it may be necessary to slow down transfer to the display.
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# If this value is set to zero, delay is disabled. Any value greater than
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# If this value is set to zero, delay is disabled. Any value greater than
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# zero slows down each write by one microsecond. [legal: 0-1000; default: 1]
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# zero slows down each write by one microsecond. [legal: 0-1000; default: 1]
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DelayMult=0
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DelayMult=0
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# The original wiring used an inverter to drive the control lines. If you do
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# not use an inverter set haveInverter to off. [default: yes; legal: yes, no]
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haveInverter=no
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## serial POS display driver ##
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## serial POS display driver ##
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[serialPOS]
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[serialPOS]
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@@ -48,11 +48,12 @@ without having a datasheet to check against!</para>
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<sect3 id="sed1520-80">
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<sect3 id="sed1520-80">
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<title>80-style connection style</title>
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<title>80-style connection style</title>
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<para>This mode of operation is selected if the RESET line is wired to ground.
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<para>This mode of operation is selected if the RESET line is wired to
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The wiring used by this driver in 80-style mode requires the use of an external
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ground. The wiring used by this driver in 80-style mode assumes you have
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74HC04 inverter and assumes you have /CS1 and /CS2 lines available (thus you
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/CS1 and /CS2 lines available (thus you must have an external clock
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must have an external clock generator) and toggles the /RW line. This is the
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generator) and toggles the /RW line. This is the original wiring by Robin Adams
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original wiring by Robin Adams.</para>
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(<ulink url="http://www.usblcd.de/lcdproc/sed1520.php4">SED1520 LPT Port</ulink>).
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</para>
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<table id="sed1520-connections-80-mapping">
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<table id="sed1520-connections-80-mapping">
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<title>SED1520 80-style wiring schematic</title>
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<title>SED1520 80-style wiring schematic</title>
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@@ -214,14 +215,6 @@ line. Writing is controlled by toggling the E1 and E2 line while /RW is low.
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</tgroup>
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</tgroup>
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</table>
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</table>
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<note>
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<para>This is the only wiring I was able to test. My display (Crystalfontz
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CFAG12232J-TFH-TA) has E1 and E2 lines. Trying to use it with 80-style wiring
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was not successful. I suspect that (as the E# line is used as /RD line in
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80-style mode) the wiring resulted in reading from one chip while writing to
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the other at the same time and the data bus got fuzzed.</para>
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</note>
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</sect3>
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</sect3>
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</sect2>
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</sect2>
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@@ -257,10 +250,11 @@ the other at the same time and the data bus got fuzzed.</para>
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the level of the RESET line: 68-style MCU interface (high level) or
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the level of the RESET line: 68-style MCU interface (high level) or
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80-style MCU interface (low level).
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80-style MCU interface (low level).
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</para><para>
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</para><para>
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Use value <literal>68</literal> if your display is connected 68-style
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Use value <literal>68</literal> if your display is connected using
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style. In this mode the E1 and E2 lines are cycled to write the data. If
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"68 family MPU" style. In this mode E1 and E2 lines are cycled to
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you use <literal>80</literal> (the default), 80-style style is selected
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write the data. If you use <literal>80</literal> (the default),
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and the /WR line is cycled and /CS1 and /CS2 lines are required.
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"80 family MPU" style is selected and the /WR line is cycled and
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/CS1 and /CS2 lines are required.
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</para></listitem>
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</para></listitem>
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</varlistentry>
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</varlistentry>
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@@ -276,6 +270,16 @@ the other at the same time and the data bus got fuzzed.</para>
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lot, larger value should likely be avoided.
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lot, larger value should likely be avoided.
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</para></listitem>
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</para></listitem>
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</varlistentry>
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</varlistentry>
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<varlistentry>
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<term>
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<property>haveInverter</property> = ¶meters.yesdefno;
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</term>
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<listitem><para>
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The original wiring by Robin used an inverter to drive the control lines.
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If you do not use an inverter set this to <literal>no</literal>.
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</para></listitem>
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</varlistentry>
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</variablelist>
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</variablelist>
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</sect3>
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</sect3>
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+51
-17
@@ -57,6 +57,7 @@ typedef struct sed1520_private_data {
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unsigned short port;
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unsigned short port;
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int interface;
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int interface;
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int delayMult;
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int delayMult;
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int haveInverter;
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unsigned char *framebuf;
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unsigned char *framebuf;
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} PrivateData;
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} PrivateData;
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@@ -90,17 +91,31 @@ writecommand(PrivateData *p, int value, int chip)
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}
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}
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else {
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else {
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port_out(p->port, value);
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port_out(p->port, value);
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/*
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if (p->haveInverter) {
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* lower WR, rise A0 and CS1 and/or CS2. Take bit inversion of parallel
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/*
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* port into account. External inverter required!
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* lower WR, rise A0 and CS1 and/or CS2 taking bit inversion of
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*/
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* parallel port into account. External inverter required!
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port_out(p->port + 2, WR + CS1 - (chip & CS1) + (chip & CS2));
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*/
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/* rise WR */
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port_out(p->port + 2, WR + CS1 - (chip & CS1) + (chip & CS2));
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port_out(p->port + 2, CS1 - (chip & CS1) + (chip & CS2));
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/* rise WR */
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if (p->delayMult) uPause(p->delayMult);
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port_out(p->port + 2, CS1 - (chip & CS1) + (chip & CS2));
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/* lower WR again */
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if (p->delayMult)
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port_out(p->port + 2, WR + CS1 - (chip & CS1) + (chip & CS2));
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uPause(p->delayMult);
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if (p->delayMult) uPause(p->delayMult);
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/* lower WR again */
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port_out(p->port + 2, WR + CS1 - (chip & CS1) + (chip & CS2));
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if (p->delayMult)
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uPause(p->delayMult);
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}
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else { /* No inverter connected */
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/* Note: CS?-(chip&CS?) drive the pin low if controller is set */
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port_out(p->port + 2, (WR + CS1 - (chip & CS1) + CS2 - (chip & CS2)) ^ OUTMASK);
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port_out(p->port + 2, (CS1 - (chip & CS1) + CS2 - (chip & CS2)) ^ OUTMASK);
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if (p->delayMult)
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uPause(p->delayMult);
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port_out(p->port + 2, (WR + CS1 - (chip & CS1) + CS2 - (chip & CS2)) ^ OUTMASK);
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if (p->delayMult)
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uPause(p->delayMult);
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}
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}
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}
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}
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}
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@@ -123,12 +138,25 @@ writedata(PrivateData *p, int value, int chip)
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}
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}
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else {
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else {
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port_out(p->port, value);
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port_out(p->port, value);
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/* lower WR and A0, rise CS1 and/or CS2. See also writecommand. */
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if (p->haveInverter) {
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port_out(p->port + 2, A0 + WR + CS1 - (chip & CS1) + (chip & CS2));
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/* lower WR and A0, rise CS1 and/or CS2. See also writecommand. */
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port_out(p->port + 2, A0 + CS1 - (chip & CS1) + (chip & CS2));
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port_out(p->port + 2, A0 + WR + CS1 - (chip & CS1) + (chip & CS2));
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if (p->delayMult) uPause(p->delayMult);
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port_out(p->port + 2, A0 + CS1 - (chip & CS1) + (chip & CS2));
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port_out(p->port + 2, A0 + WR + CS1 - (chip & CS1) + (chip & CS2));
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if (p->delayMult)
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if (p->delayMult) uPause(p->delayMult);
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uPause(p->delayMult);
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port_out(p->port + 2, A0 + WR + CS1 - (chip & CS1) + (chip & CS2));
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if (p->delayMult)
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uPause(p->delayMult);
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}
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else {
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port_out(p->port + 2, (A0 + WR + CS1 - (chip & CS1) + CS2 - (chip & CS2)) ^ OUTMASK);
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port_out(p->port + 2, (A0 + CS1 - (chip & CS1) + CS2 - (chip & CS2)) ^ OUTMASK);
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if (p->delayMult)
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uPause(p->delayMult);
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port_out(p->port + 2, (A0 + WR + CS1 - (chip & CS1) + CS2 - (chip & CS2)) ^ OUTMASK);
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if (p->delayMult)
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uPause(p->delayMult);
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}
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}
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}
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}
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}
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@@ -255,6 +283,12 @@ sed1520_init(Driver * drvthis)
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p->interface = 80;
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p->interface = 80;
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}
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}
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/*
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* The original wiring used an inverter to drive the control lines. As
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* someone may still be using this, the following setting in ON by default.
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*/
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p->haveInverter = drvthis->config_get_bool(drvthis->name, "haveInverter", 0, 1);
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/* Initialize display */
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/* Initialize display */
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writecommand(p, SOFT_RESET, CS1 + CS2);
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writecommand(p, SOFT_RESET, CS1 + CS2);
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writecommand(p, DISP_ON, CS1 + CS2);
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writecommand(p, DISP_ON, CS1 + CS2);
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