Initial commit: plasma DMD driver project

- Design docs: 12 V DC power supply, safety and bring-up, ESP32 interface, BOM
- PSU schematic (schemdraw) and KiCad 10 carrier-board project with HV net classes
- ESP32 PlatformIO firmware skeleton with HV watchdog toggle
- Reference schematic of the Stern 520-5138-00 display PSU

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

docs/safety.md

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+# Safety
+
+About 175 V sits between the +65 V and −112 V rails. Treat every HV node as live until you have
+measured it.
+
+## Design measures
+
+1. **Only certified mains equipment.** The 12 V brick is the only mains-connected part. Buy a
+   certified brand (e.g. Mean Well GST36A12) from a normal retailer, not AliExpress.
+2. **Hardware HV watchdog.** The relay on the HV modules' 12 V feed is driven through a charge pump:
+
+   ```
+   GPIO21 ──┤├──── A ──►|── B ───┬───────┬──── 2N7000 gate      2N7000 drain ─► relay IN (active-low)
+          100nF    │   1N4148    │       │                      2N7000 source ─► GND
+                   ┴ 1N4148     ═ 10µF  ▯ 100k
+                   ▲ (anode GND) │       │
+                  GND           GND     GND
+   ```
+
+   Node A gets a diode to GND (cathode at A), and a diode from A to B (anode at A). This rectifies
+   the toggling signal into a DC voltage on B. A constant high or low level gives no charge.
+
+   The firmware toggles GPIO21 once per scanned row (about 2 kHz). If it crashes, or the pin sticks high or low, or
+   the ESP32 resets, the cap discharges and the relay drops within about 1 s. A stuck row can't burn the panel.
+   (Check the polarity of your relay module's input. Some are active-low.)
+3. **Fail-safe defaults.** The relay is normally open. Put a 10 kΩ pull-down on the watchdog
+   path. Pull the panel ENABLE line to its *off* state at the 74HCT245 input, so a booting ESP32
+   can't light anything.
+4. **Sequencing.** 5 V comes up, then the ESP32 boots and starts scanning, and only then does the watchdog close the relay.
+5. **Fusing.**
+
+   | Where | Fuse |
+   |---|---|
+   | 12 V input | 3 A |
+   | Each HV module input | 1 A slow-blow |
+   | Each raw HV rail | 100 mA fast |
+
+6. **Discharge.** 330 kΩ bleeders on raw and regulated rails. HV-present LEDs are a hint only;
+   always measure before you touch anything.
+7. **Layout.**
+   - Put all HV parts on one side, with ≥ 3 mm clearance between HV tracks.
+   - Use wire and caps rated for ≥ 300 V/500 V.
+   - Use a keyed connector to the panel.
+   - Close it in a plastic enclosure with no exposed HV.
+   - Tie all grounds at one point.
+8. **Semiconductors from real distributors** (Mouser, Farnell, Reichelt). Fake HV transistors are
+   common on AliExpress.
+
+## Bring-up procedure
+
+1. Build the 5 V and 12 V side only. Check the voltages.
+2. Connect one HV module at a time, with **no load**. Set NCH6100HV #1 to 90 V and #2 to 130 V. Lock the pots with nail varnish.
+3. Connect the regulator section, still without the panel. Check for about +65 V, −112 V and −100 V and that the bleeders discharge them.
+4. Test the watchdog: stop toggling GPIO21, and the HV must drop within about 1 s.
+5. Map the panel's power connector against the measured rails. Get a second check (photo/label).
+6. First power-up with the panel: 1 kΩ in series with each HV rail and a running test pattern.
+   Measure the current per rail, then remove the series resistors.